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Title: Sr. FPGA Design Engineer - (Aerospace & Defense)
Work location: Woodland Hills, CA - Onsite
Duration: 12 months - W2 Contract
Work authorization: US Citizen; must hold a current/active US Gov't secret clearance.
Duties and responsibilities:
- The Principal Digital Engineer will be responsible for the design and verification of digital systems on a safety-critical development program.
- Possess strong communication skills as you will interface with our development program leads, senior scientists, engineering and manufacturing organizations throughout the program lifecycle.
- Have technical foresight to integrate the appropriate requirements, processes, and procedures and tools.
- BS + 5 years of experience in related STEM field; MS + 3 years of experience.; PHD in a STEM field + 1 year of relevant experience
- Experience with High-Speed Digital Design and Verification
- Experience with FPGA/SOC/ASIC implementation (VHDL/Verilog, Synthesis, Timing Closure)
- Experience with design processes including hardware requirements definition, conceptual design, detailed design, verification, production transitioning
- U.S. Citizenship is required
- A current/active Secret Clearance is required to start.
- Ability to work onsite full-time in Woodland Hills, CA
- Experience with V&V technologies (System Verilog, UVM, Hardware-In-Loop)
- Knowledge of Computer Architecture (Bus standards, Interrupts, Memory)
- Experience with Model-based Engineering (MATLAB, Simulink, Fixed Point vs. Floating Point)
- Experience with Sensors and Digital Signal Processing
- Cost Account Management (CAM) certification / experience
- Experience with safety critical designs (DO-254)
- Communication, team building and facilitation skills